November 13, 2018 | News
Enyx provides 10G TCP Acceleration Function Unit & development framework for Intel Arria® 10 GX
Stop by booth #240 to learn more about Enyx and our participation in Intel’s partner program
Dallas, TX – November 13, 2018 – Enyx, a world-class pioneer in ultra-low latency FPGA-based technology and solutions, today announced its enterprise-class TCP/IP, UDP/IP network connectivity Intellectual Property (IP) Cores for FPGAs are now fully integrated with the Intel acceleration stack. The Enyx IP Cores come packaged as a TCP Proxy reference demonstration, ready to be used on the Intel PAC with Intel Arria 10 GX FPGA.
The Enyx TCP Proxy acceleration reference design can be used for various use cases such as: Risk management of order flow in the financial markets, video transcoding, network traffic filtering or firewalling for security.
The reference implementation provided by Enyx includes two TCP Stacks connected to two of the 10G Ethernet ports on the Intel PAC board. One of the TCP stacks is configured as a server, and the other as a client. The full AFU design is provided as Verilog source code, instantiating the encrypted TCP stacks and the surrounding logic required for communication with the software layers.
Enyx provides a software connectivity layer with Intel OPAE drivers and libraries, as well as a full set of C libraries to control and monitor the stacks. An open reference application to run and monitor the demonstration, set the IP addresses, and manage the TCP connections.
This design enables the processing of incoming data directly to and from the network, bypassing the server CPU or a traditional NIC, which drastically improves the end-to-end processing latency and ensures the throughput of the processing application.
Enyx nxTCP and nxUDP IP Cores feature full RTL Layers 2, 3, 4 implementations with or without integrated 40G/25G/10G/1G MAC, compliant with the IEEE 802.3 standards, supporting ARP, IPv4, ICMP, IGMP and TCP/UDP protocols. Enyx TCP implementation on Intel Arria 10 GX devices features latencies of less than 25 ns in transmission and 90 ns in reception and can also manage up to 65,000 TCP sessions in parallel.
Stop by Booth #240 to collect your BunnyPeople™ lapel pins and discover the latest innovations in High Performance Computing!
Enyx TCP Proxy AFU FPGA architecture diagram
<< back to news list